MASKA=MASKA_0, MASKB=MASKB_0, UPDATE_MASK=UPDATE_MASK_0, MASKX=MASKX_0
Mask Register
| MASKX | PWM_X Masks 0 (MASKX_0): PWM_X output normal. 1 (MASKX_1): PWM_X output masked. |
| MASKB | PWM_B Masks 0 (MASKB_0): PWM_B output normal. 1 (MASKB_1): PWM_B output masked. |
| MASKA | PWM_A Masks 0 (MASKA_0): PWM_A output normal. 1 (MASKA_1): PWM_A output masked. |
| UPDATE_MASK | Update Mask Bits Immediately 0 (UPDATE_MASK_0): Normal operation. MASK* bits within the corresponding submodule are not updated until a FORCE_OUT event occurs within the submodule. 1 (UPDATE_MASK_1): Immediate operation. MASK* bits within the corresponding submodule are updated on the following clock edge after setting this bit. |